idereg.h

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00001 /*
00002 ** idereg.h for  in /root/research/lseosr2/programs/ide
00003 ** 
00004 ** Copyright (c)2004 Julien Quintard
00005 ** Login   <quinta_j@epita.fr>
00006 ** 
00007 ** Started on  Tue Mar  9 11:41:38 2004 Julien Quintard
00008 ** Last update Mon Dec  6 12:23:13 2004 Vianney Rancurel
00009 */
00010 #ifndef __IDEREG_H__
00011 #define __IDEREG_H__       1
00012 #include <libc.h>
00013 
00014 /*
00015  * i/o [1] registers
00016  */
00017 
00018 #define ATA_DATA                        0x00 /* R/W, 16 bits          */
00019 
00020 #define ATA_ERR                         0x01 /* R  , error            */
00021 # define ATA_ERR_BBLK                   0x80
00022 # define ATA_ERR_UNC                    0x20
00023 # define ATA_ERR_IDNF                   0x10
00024 # define ATA_ERR_ABRT                   0x04
00025 # define ATA_ERR_TK0NF                  0x02
00026 # define ATA_ERR_AMNF                   0x01
00027 
00028 #define ATA_FG                          0x01 /* W  , feature reg      */
00029 #define ATA_SC                          0x02 /* R/W, sector count     */
00030 #define ATA_SN                          0x03 /* R/W, sector number    */
00031 #define ATA_CL                          0x04 /* R/W, low cylinder     */
00032 #define ATA_CH                          0x05 /* R/W, high cylinder    */
00033 
00034 #define ATA_DH                          0x06 /* R/W, device head      */
00035 # define ATA_DH_IBM                     0xa0
00036 # define ATA_DH_LBA                     0x40
00037 # define ATA_DH_MASTER                  0x00
00038 # define ATA_DH_SLAVE                   0x10
00039 
00040 #define ATA_STAT                        0x07 /* R  , status           */
00041 # define ATA_STAT_BSY                   0x80
00042 # define ATA_STAT_DRDY                  0x40
00043 # define ATA_STAT_DWF                   0x20
00044 # define ATA_STAT_DSC                   0x10
00045 # define ATA_STAT_DRQ                   0x08
00046 # define ATA_STAT_CORR                  0x04
00047 # define ATA_STAT_INDEX                 0x02
00048 # define ATA_STAT_ERR                   0x01
00049 
00050 #define ATA_CMD                         0x07 /* W  , command          */
00051 # define ATA_CMD_READ_SECTORS           0x20
00052 # define ATA_CMD_WRITE_SECTORS          0x30
00053 # define ATA_CMD_IDENTIFY               0xec
00054 # define ATA_CMD_IDENTIFY_PACKET_DEVICE 0xa1
00055 
00056 /*
00057  * i/o [2] registers
00058  */
00059 
00060 #define ATA_ASTAT                       0x06 /* R  , alternate status */
00061 
00062 #define ATA_DCR                         0x06 /* W  , device control   */
00063 # define ATA_DCR_DEFAULT                0x08
00064 # define ATA_DCR_SRST                   0x04
00065 # define ATA_DCR_NIEN                   0x02
00066 
00067 #define ATA_DAR                         0x07 /* R  , device address   */
00068 
00069 #endif

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