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Data Structures |
struct | s_rtl8139_pci_dev |
struct | s_dev_tx |
struct | s_rtl8139_dev |
Defines |
#define | RTL8139_MAX_DEV 2 |
#define | PCI_VENDOR_REALTEK 0x10ec |
#define | PCI_PRODUCT_REALTEK_RT8129 0x10ec |
#define | RTK_PCI_LOIO 0x10 |
#define | RTK_PCI_LOMEM 0x14 |
#define | RTL8139_TX_NB 4 |
#define | RXBUF_SIZE (64 * 1024) |
#define | RXBUF_PGSIZE (ROUNDUP(RXBUF_SIZE + 16, PAGESIZE) / PAGESIZE) |
#define | RTK_IDR0 0x0000 |
#define | RTK_IDR1 0x0001 |
#define | RTK_IDR2 0x0002 |
#define | RTK_IDR3 0x0003 |
#define | RTK_IDR4 0x0004 |
#define | RTK_IDR5 0x0005 |
#define | RTK_MAR0 0x0008 |
#define | RTK_MAR1 0x0009 |
#define | RTK_MAR2 0x000A |
#define | RTK_MAR3 0x000B |
#define | RTK_MAR4 0x000C |
#define | RTK_MAR5 0x000D |
#define | RTK_MAR6 0x000E |
#define | RTK_MAR7 0x000F |
#define | RTK_TXSTAT0 0x0010 |
#define | RTK_TXSTAT1 0x0014 |
#define | RTK_TXSTAT2 0x0018 |
#define | RTK_TXSTAT3 0x001C |
#define | RTK_TXADDR0 0x0020 |
#define | RTK_TXADDR1 0x0024 |
#define | RTK_TXADDR2 0x0028 |
#define | RTK_TXADDR3 0x002C |
#define | RTK_RXADDR 0x0030 |
#define | RTK_RX_EARLY_BYTES 0x0034 |
#define | RTK_RX_EARLY_STAT 0x0036 |
#define | RTK_COMMAND 0x0037 |
#define | RTK_CURRXADDR 0x0038 |
#define | RTK_CURRXBUF 0x003A |
#define | RTK_IMR 0x003C |
#define | RTK_ISR 0x003E |
#define | RTK_TXCFG 0x0040 |
#define | RTK_RXCFG 0x0044 |
#define | RTK_TIMERCNT 0x0048 |
#define | RTK_MISSEDPKT 0x004C |
#define | RTK_EECMD 0x0050 |
#define | RTK_CFG0 0x0051 |
#define | RTK_CFG1 0x0052 |
#define | RTK_MEDIASTAT 0x0058 |
#define | RTK_MII 0x005A |
#define | RTK_HALTCLK 0x005B |
#define | RTK_MULTIINTR 0x005C |
#define | RTK_PCIREV 0x005E |
#define | RTK_TXSTAT_ALL 0x0060 |
#define | RTK_BMCR 0x0062 |
#define | RTK_BMSR 0x0064 |
#define | RTK_ANAR 0x0066 |
#define | RTK_LPAR 0x0068 |
#define | RTK_ANER 0x006A |
#define | RTK_DISCCNT 0x006C |
#define | RTK_FALSECAR 0x006E |
#define | RTK_NWAYTST 0x0070 |
#define | RTK_RX_ER 0x0072 |
#define | RTK_CSCFG 0x0074 |
#define | RTK_TXCFG_CLRABRT 0x00000001 |
#define | RTK_TXCFG_MAXDMA 0x00000700 |
#define | RTK_TXCFG_CRCAPPEND 0x00010000 |
#define | RTK_TXCFG_LOOPBKTST 0x00060000 |
#define | RTK_TXCFG_IFG2 0x00080000 |
#define | RTK_TXCFG_IFG 0x03000000 |
#define | RTK_TXCFG_HWREV 0x7CC00000 |
#define | RTK_LOOPTEST_OFF 0x00000000 |
#define | RTK_LOOPTEST_ON 0x00020000 |
#define | RTK_LOOPTEST_ON_CPLUS 0x00060000 |
#define | RTK_HWREV_8169 0x00000000 |
#define | RTK_HWREV_8169S 0x04000000 |
#define | RTK_HWREV_8110S 0x00800000 |
#define | RTK_HWREV_8139 0x60000000 |
#define | RTK_HWREV_8139A 0x70000000 |
#define | RTK_HWREV_8139AG 0x70800000 |
#define | RTK_HWREV_8139B 0x78000000 |
#define | RTK_HWREV_8130 0x7C000000 |
#define | RTK_HWREV_8139C 0x74000000 |
#define | RTK_HWREV_8139D 0x74400000 |
#define | RTK_HWREV_8139CPLUS 0x74800000 |
#define | RTK_HWREV_8101 0x74c00000 |
#define | RTK_HWREV_8100 0x78800000 |
#define | RTK_TXDMA_16BYTES 0x00000000 |
#define | RTK_TXDMA_32BYTES 0x00000100 |
#define | RTK_TXDMA_64BYTES 0x00000200 |
#define | RTK_TXDMA_128BYTES 0x00000300 |
#define | RTK_TXDMA_256BYTES 0x00000400 |
#define | RTK_TXDMA_512BYTES 0x00000500 |
#define | RTK_TXDMA_1024BYTES 0x00000600 |
#define | RTK_TXDMA_2048BYTES 0x00000700 |
#define | RTK_TXSTAT_LENMASK 0x00001FFF |
#define | RTK_TXSTAT_OWN 0x00002000 |
#define | RTK_TXSTAT_TX_UNDERRUN 0x00004000 |
#define | RTK_TXSTAT_TX_OK 0x00008000 |
#define | RTK_TXSTAT_EARLY_THRESH 0x003F0000 |
#define | RTK_TXSTAT_COLLCNT 0x0F000000 |
#define | RTK_TXSTAT_CARR_HBEAT 0x10000000 |
#define | RTK_TXSTAT_OUTOFWIN 0x20000000 |
#define | RTK_TXSTAT_TXABRT 0x40000000 |
#define | RTK_TXSTAT_CARRLOSS 0x80000000 |
#define | RTK_ISR_RX_OK 0x0001 |
#define | RTK_ISR_RX_ERR 0x0002 |
#define | RTK_ISR_TX_OK 0x0004 |
#define | RTK_ISR_TX_ERR 0x0008 |
#define | RTK_ISR_RX_OVERRUN 0x0010 |
#define | RTK_ISR_PKT_UNDERRUN 0x0020 |
#define | RTK_ISR_FIFO_OFLOW 0x0040 |
#define | RTK_ISR_CABLE_LEN_CHGD 0x2000 |
#define | RTK_ISR_TIMEOUT_EXPIRED 0x4000 |
#define | RTK_ISR_SYSTEM_ERR 0x8000 |
#define | RTK_INTRS |
#define | RTK_INTRS_CPLUS |
#define | RTK_MEDIASTAT_RXPAUSE 0x01 |
#define | RTK_MEDIASTAT_TXPAUSE 0x02 |
#define | RTK_MEDIASTAT_LINK 0x04 |
#define | RTK_MEDIASTAT_SPEED10 0x08 |
#define | RTK_MEDIASTAT_RXFLOWCTL 0x40 |
#define | RTK_MEDIASTAT_TXFLOWCTL 0x80 |
#define | RTK_RXCFG_RX_ALLPHYS 0x00000001 |
#define | RTK_RXCFG_RX_INDIV 0x00000002 |
#define | RTK_RXCFG_RX_MULTI 0x00000004 |
#define | RTK_RXCFG_RX_BROAD 0x00000008 |
#define | RTK_RXCFG_RX_RUNT 0x00000010 |
#define | RTK_RXCFG_RX_ERRPKT 0x00000020 |
#define | RTK_RXCFG_WRAP 0x00000080 |
#define | RTK_RXCFG_MAXDMA 0x00000700 |
#define | RTK_RXCFG_BUFSZ 0x00001800 |
#define | RTK_RXCFG_FIFOTHRESH 0x0000E000 |
#define | RTK_RXCFG_EARLYTHRESH 0x07000000 |
#define | RTK_RXDMA_16BYTES 0x00000000 |
#define | RTK_RXDMA_32BYTES 0x00000100 |
#define | RTK_RXDMA_64BYTES 0x00000200 |
#define | RTK_RXDMA_128BYTES 0x00000300 |
#define | RTK_RXDMA_256BYTES 0x00000400 |
#define | RTK_RXDMA_512BYTES 0x00000500 |
#define | RTK_RXDMA_1024BYTES 0x00000600 |
#define | RTK_RXDMA_UNLIMITED 0x00000700 |
#define | RTK_RXBUF_8 0x00000000 |
#define | RTK_RXBUF_16 0x00000800 |
#define | RTK_RXBUF_32 0x00001000 |
#define | RTK_RXBUF_64 0x00001800 |
#define | RTK_RXFIFO_16BYTES 0x00000000 |
#define | RTK_RXFIFO_32BYTES 0x00002000 |
#define | RTK_RXFIFO_64BYTES 0x00004000 |
#define | RTK_RXFIFO_128BYTES 0x00006000 |
#define | RTK_RXFIFO_256BYTES 0x00008000 |
#define | RTK_RXFIFO_512BYTES 0x0000A000 |
#define | RTK_RXFIFO_1024BYTES 0x0000C000 |
#define | RTK_RXFIFO_NOTHRESH 0x0000E000 |
#define | RTK_RXSTAT_RXOK 0x00000001 |
#define | RTK_RXSTAT_ALIGNERR 0x00000002 |
#define | RTK_RXSTAT_CRCERR 0x00000004 |
#define | RTK_RXSTAT_GIANT 0x00000008 |
#define | RTK_RXSTAT_RUNT 0x00000010 |
#define | RTK_RXSTAT_BADSYM 0x00000020 |
#define | RTK_RXSTAT_BROAD 0x00002000 |
#define | RTK_RXSTAT_INDIV 0x00004000 |
#define | RTK_RXSTAT_MULTI 0x00008000 |
#define | RTK_RXSTAT_LENMASK 0xFFFF0000 |
#define | RTK_RXSTAT_UNFINISHED 0xFFF0 |
#define | RTK_RXSTAT_LEN 4 |
#define | RTK_CMD_EMPTY_RXBUF 0x0001 |
#define | RTK_CMD_TX_ENB 0x0004 |
#define | RTK_CMD_RX_ENB 0x0008 |
#define | RTK_CMD_RESET 0x0010 |
#define | RTK_EE_DATAOUT 0x01 |
#define | RTK_EE_DATAIN 0x02 |
#define | RTK_EE_CLK 0x04 |
#define | RTK_EE_SEL 0x08 |
#define | RTK_EE_MODE (0x40|0x80) |
#define | RTK_EEMODE_OFF 0x00 |
#define | RTK_EEMODE_AUTOLOAD 0x40 |
#define | RTK_EEMODE_PROGRAM 0x80 |
#define | RTK_EEMODE_WRITECFG (0x80|0x40) |
#define | RTK_EEADDR_LEN0 6 |
#define | RTK_EEADDR_LEN1 8 |
#define | RTK_EECMD_LEN 4 |
#define | RTK_EECMD_WRITE 0x5 |
#define | RTK_EECMD_READ 0x6 |
#define | RTK_EECMD_ERASE 0x7 |
#define | RTK_EE_ID 0x00 |
#define | RTK_EE_PCI_VID 0x01 |
#define | RTK_EE_PCI_DID 0x02 |
#define | RTK_EE_EADDR0 0x07 |
#define | RTK_EE_EADDR1 0x08 |
#define | RTK_EE_EADDR2 0x09 |
#define | RTK_CFG0_ROM0 0x01 |
#define | RTK_CFG0_ROM1 0x02 |
#define | RTK_CFG0_ROM2 0x04 |
#define | RTK_CFG0_PL0 0x08 |
#define | RTK_CFG0_PL1 0x10 |
#define | RTK_CFG0_10MBPS 0x20 |
#define | RTK_CFG0_PCS 0x40 |
#define | RTK_CFG0_SCR 0x80 |
#define | RTK_CFG1_PWRDWN 0x01 |
#define | RTK_CFG1_SLEEP 0x02 |
#define | RTK_CFG1_IOMAP 0x04 |
#define | RTK_CFG1_MEMMAP 0x08 |
#define | RTK_CFG1_RSVD 0x10 |
#define | RTK_CFG1_DRVLOAD 0x20 |
#define | RTK_CFG1_LED0 0x40 |
#define | RTK_CFG1_LED1 0x80 |
Typedefs |
typedef s_rtl8139_dev | rtl8139_dev_t |